(a) Field of the Invention
The present invention relates to liquid crystal displays and manufacturing methods thereof, more specifically to liquid crystal displays having electrode arrays for applying electric fields parallel to substrates and thin film transistors as switching elements and manufacturing methods thereof.
(b) Description of the Related Art
A liquid crystal display (LCD) having an electrode array for generating an electric field which is parallel to substrates (IPS mode; in-plane switching mode) is disclosed in U.S. Pat. No. 5,598,285 of Kondo et al.
The IPS mode LCD of Kondo et al. has two substrates opposite each other and a liquid crystal layer therebetween. Two kinds of electrodes for generating electric field, common electrodes and pixel electrodes are formed on one of the substrates. An alignment layer is coated on the electrodes.
However, since the two kinds of electrodes are made of different layers and have different thickness, the surface of the alignment layer may not be flat, and this causes non-uniform rubbing which may result in light leakage.
Moreover, the liquid crystal display of Kondo et al., in particular, transistors of the liquid crystal display are easily defected by the electrostatic discharge because the two electrodes are formed together on a single substrate.
For electrostatic discharge protection, all wires may be short-circuited during the manufacturing process and separated after the manufacture of the panel is completed. However, this method is complicated.
In view of the above, it is an object of the present invention to reduce the light leakage of IPS mode liquid crystal displays.
It is another object of the present invention to prevent thin film transistors from being destroyed by the electrostatic discharge.
It is another object of the present invention to simplify the manufacturing process of IPS mode liquid crystal displays.
It is another object of the present invention to decrease the opening of wires.
It is another object of the present invention to increase the reliability of the contacts between pads and drivers.
These and other objects, features and advantages are provided, according to the present invention, by forming a pixel electrode using a thin single conductive layer, and a data line is formed as a double layer.
The thickness of the single conductive layer forming a pixel electrode may be equal to or less than 1,000 xc3x85. It is more preferable that the thickness of the single conductive layer is equal to or less than 500 xc3x85. The double layer forming a data line may include a lower layer, which is the same as the pixel electrode, and an upper layer having a low resistivity of 15 xcexcxcexa9cm or less. The single layer or the lower layer of the double layer may be formed using a metal having a low resistivity of 15 xcexcxcexa9cm or less, and the upper layer may be formed by a pad material which is not easily broken in the manufacturing process.
A passivation layer which is thick relative to the pixel wire may have relatively flat surface since the pixel wire is relatively thin. The flat surface may give rise to uniform rubbing and thus the light leakage may be reduced.
These and other objects, features and advantages are also provided, according to the present invention, by forming a common signal wire and a gate wire including a gate line, a gate electrode a gate pad and a gate line connector on a substrate, forming a gate insulating layer over the common signal wire and the gate wire, forming a channel layer and an ohmic contact layer thereon, forming a pixel electrode and a data wire including a source and a drain electrodes, a data line, a data pad and a data line connector using a first conductive layer, forming a passivation layer on the data wire and the pixel electrode, forming a redundant data wire including a redundant data line, a redundant data pad and a redundant data line connector, a redundant gate pad and a redundant gate line connector using a second conductive layer. The redundant data wire is electrically connected to the data wire through the contact holes formed in the passivation layer. The redundant gate pad and the redundant gate line connector are connected to the gate pad and the gate line connector respectively through the contact holes formed in the gate insulating layer and the passivation layer. The redundant gate line connector and the redundant data line connector are connected with each other to short-circuit the gate lines and the data lines on the substrate.
After forming the panel, an alignment layer is printed and rubbed, and the gate line connector and the data line connector are removed by cutting out the edge of the panel.
The pixel electrode may be formed in the step of forming redundant data wire using the second conductive layer instead of the first conductive layer, and the thickness of the pixel electrode may be equal to or less than 500 xc3x85.
The redundant data wire may be formed as a single or a double layer, and the single layer or the upper layer of the double layer may be formed using a pad material which is not easily broken in the manufacturing process.